Architectures, Antennas and Circuits for Millimeter-wave Wireless Full-Duplex Applications

Demand for wireless network capacity keeps growing exponentially every year, as a result a 1000-fold increase in data traffic is projected over the next 10 years in the context of 5G wireless networks. Solutions for delivering the 1000-fold increase in capacity fall into three main categories: deploying smaller cells, allocating more spectrum and improving spectral efficiency of wireless systems. Smaller cells at RF frequencies (1-6GHz) are unlikely to deliver the demanded capacity increase. On the other hand, millimeter-wave spectrum (frequencies over 24GHz) offers wider, multi-GHz channel bandwidths, and therefore has gained significant research interest as one of the most promising solutions to address the data traffic demands of 5G. Another disruptive technology is full-duplex which breaks a century-old assumption in wireless communication, by simultaneous transmission and reception on the same frequency channel. In doing so, full-duplex offers many benefits for wireless networks, including an immediate spectral efficiency improvement in the physical layer. Although FD promises great benefits, self-interference from the transmitter to its own receiver poses a fundamental challenge. The self-interference can be more than a billion times stronger than the desired signal and must be suppressed below the receiver noise floor. In recent years, there has been some research efforts on fully-integrated full-duplex RF transceivers, but mm-wave fully-integrated full-duplex systems, are still in their infancy. This dissertation presents novel architectures, antenna and circuit techniques to merge two exciting technologies, mm-wave and full-duplex, which can potentially offer the dual benefits of wide bandwidths and improved spectral efficiency. To this end, two different antenna interfaces, namely a wideband reconfigurable T/R antenna pair with polarization-based antenna cancellation and an mm-wave fully-integrated magnetic-free non-reciprocal circulator, are presented. The polarization-based antenna cancellation is employed in conjunction with the RF and digital cancellation to design a 60GHz full-duplex 45nm SOI CMOS transceiver with nearly 80dB self-interference suppression. The concepts and prototypes presented in this dissertation have also profound implications for emerging applications such as vehicular radars, 5G small-cell base-stations and virtual reality

A high power handling capability CMOS T/R switch for x-band phased array antenna systems

This paper presents a single-pole double-throw (SPDT) transmit/receive (T/R) switch fabricated in 0.25-μm SiGe BiCMOS process for X-Band (8 – 12 GHz) phased array radar applications. The switch is based on series-shunt topology with combination of techniques to improve insertion loss (IL), isolation and power handling capability (P1dB). These techniques include optimization of transistor widths for lower insertion loss and parallel resonance technique to improve isolation. In addition, DC biasing of input and output ports, on-chip impedance transformation networks (ITN) and resistive body-floating are used to improve P1dB of the switch. All these design techniques resulted in a measured IL of 3.6 dB, isolation of 30.8 dB and P1dB of 28.2 dBm at 10 GHz. The return losses at both input and output ports are better than 16 dB from 8 to 12 GHz. To our knowledge, this work presents the highest P1dB at X-Band compared to other reported single-ended CMOS T/R switches in the literature

A new resonant circuit for 2.45 GHz LC VCO with linear frequency tuning

A new MOS varactor bank is proposed to implement a 2.45 GHz SiGe BiCMOS LC-tank voltage controlled oscillator (VCO) with linear frequency tuning. Compared to a conventional VCO, the proposed technique improves the quality factor of the LC-tank while preserving the linearity of the circuit. Realized in 0.25-μm SiGe BiCMOS technology, VCO exhibits 35% VCO gain (KVCO) variation from 2.29 to 2.66 GHz with a 16% tuning ratio. The VCO also exhibits a phase noise of -113 dBc/Hz at 1 MHz offset frequency and consumes 1.7 mA from 1.8 V supply

SiGe BiCMOS front-end circuits for X-Band phased arrays

The current Transmit/Receive (T/R) modules have typically been implemented using GaAs- and InP-based discrete monolithic microwave integrated circuits (MMIC) to meet the high performance requirement of the present X-Band phased arrays. However their cost, size, weight, power consumption and complexity restrict phased array technology only to certain military and satellite applications which can tolerate these limitations. Therefore, next generation X-Band phased array radar systems aim to use low cost, silicon-based fully integrated T/R modules. For this purpose, this thesis explores the design of T/R module front-end building blocks based on new approaches and techniques which can pave the way for implementation of fully integrated X-Band phased arrays in low-cost SiGe BiCMOS process. The design of a series-shunt CMOS T/R switch with the highest IP1dB, compared to other reported works in the literature is presented. The design focuses on the techniques, primarily, to achieve higher power handling capability (IP1dB), along with higher isolation and better insertion loss of the T/R switch. Also, a new T/R switch was implemented using shunt NMOS transistors and slow-wave quarter wavelength transmission lines. It presents the utilization of slow-wave transmissions lines in T/R switches for the first time in any BiCMOS technology to the date. A fully integrated DC to 20 GHz SPDT switch based on series-shunt topology was demonstrated. The resistive body oating and on-chip impedance transformation networks (ITN) were used to improve power handling of the switch. An X-Band high performance low noise ampli er (LNA) was implemented in 0.25 μm SiGe BiCMOS process. The LNA consists of inductively degenerated two cascode stages with high speed SiGe HBT devices to achieve low noise gure (NF), high gain and good matching at the input and output, simultaneously. The performance parameters of the LNA collectively constitute the best Figure-of-Merit value reported in similar technologies, to the best of author's knowledge. Furthermore, a switched LNA was implemented SiGe BiCMOS process for the first time at X-Band. The resistive body floating technique was incorporated in switched LNA design, for the first time, to improve the linearity of the circuit further in bypass mode. Finally, a complete T/R module with a state-of-the-art performance was implemented using the individually designed blocks. The simulations results of the T/R module is presented in the dissertation. The state-of-the-art performances of the presented building blocks and the complete module are attributed to the unique design methodologies and techniques

Evaluation of vertebral bone mineral density in scoliosis by using quantitative computed tomography

Purpose: Scoliosis is described as a lateral curvature of the spine. We aimed to evaluate bone mineral density (BMD) in patients with scoliosis by using quantitative computed tomography (QCT) and compare the BMD of idiopathic and congenital scoliosis patients. Material and methods: Forty-three patients aged 1 to 40 years with idiopathic, congenital, or neuromuscular scoliosis and 41 matched controls of the same sex and approximate age were included in the study. Measurements of BMD were performed by QCT analysis for each vertebral body from T12 to L5, and mean BMD was calculated for each case. Results: Twenty-two of the patients with scoliosis were idiopathic, 15 were congenital, four were neuromuscular, and two were neurofibromatosis. The mean BMD values of patients with scoliosis were significantly lower compared with the control group (106.8 ± 33.4 mg/cm3 vs. 124.9 ± 29.1 mg/cm3, p = 0.009). No significant difference in BMD values was found between idiopathic and congenital scoliosis patients (p > 0.05). Conclusions: This study illustrated that the vertebral body BMD values of the patients with scoliosis were significantly lower than those seen in the control group